| 1 |
Cheong Ngai, R.P.Martins, J.E.Franca, "A Novel Algorithm for Automated Optimum Design of IIR SC Decimator", IEEE Trans. Circuits and Systems - II, Vol. 49, No.4, pp.293-296, April 2002. |
| 2 |
Cheong Ngai, R.P.Martins, "Interactive SC Multirate Compiler applied to Multistage Decimator Design", in Proc. IEEE Symposium on Circuit and Systems, pp.III185-III188, Geneva, Switzerland, May 2000. |
| 3 |
Cheong Ngai, R.P.Martins, "Selection Topology of IIR Multirate SC Decimating Filters with Statistical Model", in the Abstract book, First Portugal-China Workshop on Solid-State Circuits-CPSSW, pp. 30-31, Shanghai, China, October 2000. |
| 4 |
Cheong Ngai, R.P.Martins, "Design Considerations of SC Analogue Multirate Filter with Multistage Implementation",in the Abstract book, First Portugal-China Workshop on Solid-State Circuits-CPSSW, pp. 34-35,Shanghai, China,October 2000. |
| 5 |
Cheong Ngai, R.P Martins,"Synthesis and Design of a 7th-order SC Lowpass Decimator Combining Externally Cascaded and Ladder-structures", in Proc. IEEE Symposium on Signal Processing Systems-SiPS, Taipei, Taiwan, pp. 681-685, October 1999. |
| 6 |
Cheong Ngai, R. P.Martins, " Synthesis and Design of a 6th Order SC Lowpass Decimator Combining Externally and Internally Cascaded Structures", IEEE Proc. Int conference on ASIC, pp.9-12, Seoul, Korea, Aug. 1999. |
| 7 |
Cheong Ngai, R. P. Martins ,"A Computer Aided Tool (SCDECIN) of IIR SC Decimator for High Frequency Signal Processing", Macau IT Congress 99, pp.100-104, Mar. 1999. |
| 8 |
Cheong Ngai, R.P.Martins, "Automated Design of SC Multistage Sampling Rate Converters Using Linear/Nonlinear Programming", 3rd International Conference on ASIC,pp.342-345,Beijing, China, Oct. 1998. |
| 9 |
張毅，王瑤琨，“澳門教育機構的電腦網絡技術應用現況與展望”， 第三屆全球華人計算教育應用大會(GCCCE'99), pp. 343-348, 一九九九年六月，澳門。 |
| 10 |
張毅,“電腦輔助設計軟件在澳門的發展前景”澳門資訊年會2001, 二零零一年十一月，澳門。 |
| 11 |
Cheong Ngai, R.P.Martins, J.E.Franca, “ISCMRATE: An Interactive Compiler for Automated Design of IIR SC Multistage and Multirate Filters”, submitted for publication in IEEE Trans. Computer-Aided Design of Integrated Circuit and Systems, 2001. |
| 12 |
Cheong Ngai, R.P.Martins, “A Building Block System for Automatic Design of IIR SC Multistage Decimators” Revista do Instituto Politecnico de Macau, pp.195-221, Vol. 4 (1) 2001. |
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